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Technical Paper

Author	Advantest Laboratories Ltd.　Kazuya Uryu others
Summary	We studied the mechanism of low-temperature-annealed Ohmic contacts to AlGaN/GaN heterostructures via formation and removal of Ta/Al/Ta Ohmic-metals. Multi-probe Hall device measurements show one order increase in the sheet electron concentration after the Ohmic-metal formation compared with that before the formation, indicating that high-density doping takes place in the AlGaN/GaN heterostructure under the Ohmicmetal. However, after the Ohmic-metal removal, the increased sheet electron concentration returns to the value before the formation.Moreover, we formed Ni/Au Schottky contacts on the AlGaN/GaN heterostructures before the Ohmic-metal formation and after the Ohmic-metal removal, and confirmed that the characteristics are almost the same. These results indicate that donors do not exist after the Ohmic-metal removal, suggesting that, although high-density doping takes place, high-density donors are not formed under the Ohmic-metal. The high-density doping without high-density donors could be attributed to polarization doping, playing a significant role in the Ohmic contact formation.
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Author	DH Business Group, NTC Development Department, NHS Development Section　Toshiyuki Omuro others
Summary	The market demand for high bandwidth memory (HBM) has been growing significantly in line with the practical application of artificial intelligence. Since the current wafer test cannot guarantee the component’s functionality after dicing, we have developed a die carrier solution that can test the bare die after dicing from the wafer. Since the die carrier covers the bare die, the challenges were that (1) the test pad and probe pins of the bare die cannot be directly observed and aligned, and (2) the bare die cannot be cooled directly. To solve these problems, we developed (1) an indirect alignment method based on the relative positions of the bare die's μBump and die carrier, and (2) a structure that maximizes heat exchange efficiency by building channels inside the die carrier to allow cooling media to flow through.
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Author	Sales Group, System Solution Division, Memory SE Department, GMS Section　Toru Kushida others
Summary	Recently, SCA (Separate Command Address) has been defined by JEDEC in response to the increasing speed of NAND interface testing. Conventionally, Command/Address input for NAND devices has been serially input from the DQ pin, but by splitting the DQ bus and CA bus, it is possible to input the next Command/ Address during DQ bus input. This reduces the conventional Command/Address input and polling time, and improves the overall device access speed. SCA protocol work asynchronously in different Time Domains for each of the DQ bus and CA bus. The functions required of device controllers and testers are the ability to control multiple patterns and to run them synchronously. The T5835 utilizes multiple function blocks internally contained within a single pin electronics to achieve the testing required by the SCA. Two different software and hardware methods have been established for the functions to synchronize at any given time. By proposing solutions for different purposes, we were able to provide a solution that meets each customer's needs for NAND interface testing.
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