V93000

The Ultimate Choice in Scalability

THE V93000 SCALABLE PLATFORM

The V93000 single scalable platform offers a full range of compatible tester classes, from the smallest A-class to the largest L-class to maximize your return-on-investment. The class determines the possible size of the configuration and allows to fit the size and performance of the tested device. All features and performance points are available in all classes.

RF Solution

Architecturally advanced cards provide the high parallelism and massive multi-site capabilities that allow customers to cost-effectively test current and upcoming generations of communication devices.

To remain on pace with the semiconductor technology advances leading to next-generation 5G wireless communications, testing capabilities for RF and mixed-signal ICs must reach new highs in parallelism and throughput. ADVANTEST’s Wave Scale generation of channel cards for the V93000 platform enable highly parallel multi-site and in-site testing that dramatically reduces the cost of test and ultimately the time to market for current and future devices.

Paving the Way for Testing 5G ICs

Wave Scale RF and Wave Scale MX cards help to create paths for testing 5G devices by delivering high-efficiency test solutions for the ICs used in both today’s and emerging 5G NR (3GPP new radio), LTE, LTE-Advanced and LTE-A Pro smart phones as well as LTE-M, WLAN, GPS, ZigBee, Bluetooth and IoT applications. The cards’ advanced architectures allow for highly parallel testing of multiple communication standards or multiple paths within each device, resulting in high multi-site efficiency and a much lower cost of test.

Versatile Digital Solution

Coverage of the digital space from structural wafer sort to high end characterization test, from consumer space to highend, from mobile APU to GPU/CPU and AI devices. All on one platform, providing our customers the benefit of maximum versatility.

Industry Challenges

The drive for more functions per die and the drive for power reduction to enable ever longer battery lifetime of mobile devices drives technology nodes. Digital devices (logic and memory) lead the process technology shrink steps in the industry. Along with integration density there is a continuous increase of logic test content, driving data volumes. Very high speed I/O technology, SerDes based (such as PCIe, USB, HDMI.. ) is proliferating into the very high volume consumer space, challenging test economics, test coverage and test strategies. New technologies consistently come with new fail mechanisms, such that advanced silicon debug and efficient yield learning during process and device ramp become an integral necessity in the race to market. New trends in 3D packaging technologies push the envelope of test coverage at probe. Seamless integration with the design tools, full automation of the design to test and test back to design flow and process are key to success.

The V93000 Versatile Digital Solution

The V93000 digital test solution is based upon Advantest's proven per-pin architecture, enabling a broad variety of capabilities for the core digital test cases. Whether you need to address very high pin counts, address a high degree of parallelism and multisite efficiency, address large scan data volumes, support sophisticated power delivery or explore very high speeds or timing accuracy, the V93000 provides solutions across the entire space in one go.

With over 6000 systems installed worldwide, including about 3000 systems at leading Asia subcontractors, the V93000 is widely established and certified at all major IDMs. The platform has become the all purpose reference platform.

Superior cross platform compatibility allows our upstream customers to choose from state of the art latest systems or load the same base program on the large fleet of legacy V93000 system for the more mature products, thus picking optimum cost of test operating points. For the OSATs the cross generation compatibility means maximum investment protection, optimum reuse of resources and a high degree of flexibility for load balancing within the fleet.

The uncompromised per-pin architecture of the V93000 resources as deployed in the SmartScale series results in a number of key benefits and assets for the digital application domain:

• All per-pin DC resources - leading maximum parallelism
• Per-pin TMU - addressing the pervasive use of local PLL-based time domain synthesis avoiding special resources and routing
• Per-pin sequencing - enabling flexible I/O port assignments and concurrent execution of multi domain functions
• Versatile and scalable power supplys sources up to 500 A or more with exceptional load step response time
• Flexible vector memory architecture and licensing options enabling a broad mix of deep scan to high speed functional tests
• Leading edge performance cards provide the base for high speed solutions up to 32 Gbps.
   

PAC (Power Analog Control) Solution

The V93000 PAC solution offers a set of instruments to address the diverse test needs for power, analog and controller ICs. With high density cards, universal features and precision force and measurement capabilities the PAC solution enables leading CoT savings at high site count testing.

Addressing semiconductor test challenges

Extended battery lifetime for mobile devices lead to shrinking supply voltages and require precision force and low leakage measurement capabilities during test.

Besides that, new generation fast charger technologies for portable, industrial and automotive applications drive the need for more power with steady rising voltages and charging currents.

The ongoing semiconductor integration trend leads to complex I/O structures which demand the connection of universal ATE resources featuring analog, mixed signal and digital capabilities on the same instrument channel.

The AVI64, FVI16 and PowerMUX instruments further expand the usage of the single scalable V93000 test platform with an uncompromised feature set such as:

• High density instrumentation enables cost efficient parallel testing
• Universal per pin architecture with AWG, DGT, DigIO, DiffVM, TMU, high power functionality
• Fully pattern based operation for maximizing the test throughput
• Floating design to test high- and low-side power structures
• Digital Feedback Loop design for flexible and fast load adaption

The universal digital pin PS1600 offers high end digital functionality as well as analog test performance. Combined with the high density DUT power supply DPS128 the solution offers highly parallel test capability for MCUs with embedded analog cores as well as SmartCards and NFC controllers.

Direct Probe™

High-performance, multi-site functional testing now possible at wafer probe

Advantest's V93000 Direct Probe™solution reduces the length and number of signal path transitions between tester and probe card enabling the industry's highest test performance to now be brought to wireless, WLCSP, MPU and GPU devices at wafer probe.

Working closely with leading probe card manufacturers, Advantest has successfully overcome traditional barriers to delivering high performance test at wafer probe. Advantest's Direct Probe™ reduces the length and number of signal-path connections between tester pin electronics and probe points, significantly improving signal integrity for device testing. With higher quality signals, the control and performance needed for accurate stimulation and full functional testing of digital, mixed-signal and RF devices directly on the wafer is possible.

Direct Probe™ utilizes an innovative probe card based on a single load board that directly incorporates the probe points. The single load board can leverage existing final test designs and can be shared between wafer probe and final test, reducing hardware development time and hardware cost.

Direct Probe™ is mechanically designed and engineered for contact force management and with the planarity to support large surfaces and high pin counts at wafer test. The result: excellent mechanical and electrical contact is assured.

• With Advantest's V93000 Direct Probe solution, manufacturers can now take a major step forward toward complete high performance functional testing at wafer probe and significantly lower cost of test
• Maximum test resource utilization, high parallelism and high throughput for lowest cost of test
• Shorter hardware development time and cost due to innovative probe card design
• High-performance signal integrity from tester pin electronics to probe tip
• Mechanically designed for contact force management and planarity to support large surfaces and high pin counts at wafer test

Introducing Direct Probe 2.0

Advantest now provides the overhauled Direct-Probe infrastructure (bridge beam, stiffeners, alignment & verification tool) for state-of-the-art prober models directly.

Advantest’s bridge beams provide:

• Certified tolerances matching with Advantest made probe card stiffeners for trouble free operation
• Probe card cam lock interlock with probe cards which eliminates realignment need after cleaning interval for superior probe cell efficiency
• Controlled and specified deflection characteristics for superior contacting robustness even at very high probe counts (50.000)

The Advantest bridge beams are specifically designed to match all application areas, featuring cut outs to provide the required instrument space, so that the new front-end modules can access the DUT interface board / probe card. (Cut outs impact deflection/rigidity properties)

Features&Benefits

Detailed Benefits

Highest performance for high-volume manufacturing, multi-site probe test of digital, mixed-signal and RF devices at wafer stage

• Enables probe test of high pin count MPU/GPU devices requiring high digital performance and high current contacting
• Consumer audio/video, mixed-signal and RF devices that are rapidly moving to wafer-level chip scale packaging (WLCSP) and require high performance probe test

Maximum test resource utilization, high parallelism and high throughput for lowest cost of test

With greater multi-site testing, reduced index times (<1s) and faster test times, manufacturers can achieve the high throughput needed to drive down cost of test.

Innovative probe card design, reducing hardware cost and hardware design time

V93000 Direct Probe™ 's innovative probe card design, places the probe assembly directly on the load board, improving test performance and reducing hardware cost and hardware design time from design to production.

High-performance signal integrity from tester pin electronics to probe tip

The current industry standard for wafer prober interface (Pogo Tower) degrades the signal quality because the signal must pass through multiple transition points and a distance of 4 to 5 inches. V93000 Direct Probe™ interfaces the test head directly with the probe assembly, reducing the length and number of signal path transitions, maintaining signal integrity.

Mechanically designed for contact force management and planarity to support large surfaces and high pin counts at wafer test

V93000 Direct Probe™ addresses all major contacting challenges (pad probe, Flip Chip, TSV(Through Silicon Vias) and WLCSP) by supporting contact force up to 400 kg and maintaining planarity (1mm over 44,000mm2) for excellent mechanical and electrical contact quality for large die sizes and in high pin count devices such as with MPUs and GPUs.

Probe card cam lock interlock with probe cards which eliminates realignment need after cleaning interval for superior probe cell efficiency

During card clamp operation, Direct-Probe Bridge Beam pushes and holds probe card alignment pins to the datum point, and constraints XY card movement.