No.51 (January, 2019) No.51 (January, 2019)

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* Author positions and job titles are valid at time of submissions and not necessarily current.

Technical Paper

Title/Author
Drain-induced barrier lowering in normally-off AlGaN-GaN MOSFETs with singleor double-recess overlapped gate
Advantest Laboratories Ltd. Taku Sato others
A Stressed Eye Testing Module for Production Test of 30-Gbps NRZ Signal Interfaces
FT Technology R&D Section 2, 5th R&D Department, Technology Development, Business Promotion Group Kiyotaka Ichiyama others
Accurate error bit mode analysis of STT-MRAM chip with a novel current measurement module implemented to gigabit class memory test system
Memory SE1, Memory System Engineering, System Solution Division, Sales Group Ryo Tamura others

Application

Title/Author
New Thermal Technology for a New Burn-in Test System
CHL Group, Mechanical Design Department, Mechanical Engineering Division, Production Group Tsuyoshi Yamashita
T2000 IPS + GPWGD: a Measurement Technique with Ultra-High Dynamic Range for Hi-Res Audio
Solution Section 1, Solution Department, System Planning Division, T2000 Business Unit, ATE Business Group Takahiro Nakajima others