Technical Paper Technical Paper

Title No.
Fabrication of vertical-taper structures for silicon photonic devices by using local-thickness-thinning process No.61
Low-profile Water-cooled Cold Plate No.61
Separation of signal and environmental magnetic noise using independent component analysis No.60
Breakthrough for Test Cost Reduction on MicroLED Device with Electric-Luminescence and Electrical Test Embedded Solution No.60
Cherenkov-type phase matched terahertz wave generation from LiNbO3 waveguide using mode-locked fiber laser and optical amplifier No.59
Software Execution Time Reduced by New Tester-per-Site Architecture Using High-performance CPU No.59
Test cost reduction according to Adaptive Probe Cleaning No.59
Open-short Normalization Method for a Quick Defect Identification in Branched Traces with High-resolution Time-domain Reflectometry No.58
GaN 8Gbps High-Speed Relay MMIC for Automated Test Equipment No.58
A Calibration Technique for Simultaneous Estimation of Actual Sensing Matrix Coefficients on Modulated Wideband Converters No.57
High-speed measurement of Piezoelectric MEMS equivalent circuit parameters by Swept-sine and PRBS signals No.57
Over-the-Air (OTA) Test Socket and Handler Integration Technology for 5G Mass Production Testing No.57
Study of spatial filter for magnetocardiography measurements without a magnetically shielded room No.56
Development of High Voltage General-purpose Pin-Electronics No.56
Photonic integration based on a ferroelectric thin-film platform No.55
A novel memory test system with an electromagnet for STT-MRAM testing No.55
Development of digital controlled technology for high voltage DC testing No.55
Metrology at Automated Test Equipment Manufacturers No.55
A 40 GHz Linear Driver Amplifier for Optical ATE using GaN HEMT with InGaN Back Barrier No.54
Ultra-Wideband Modulation Signal Measurement Using Local Sweep Digitizing Method No.54
Estimation of fogging effect in E-Beam direct writer for photonic crystal pattern No.54
A Review of Combiner/Divider PCB Design Topologies For 5G and WiGig ATE Applications No.53
A Jitter Injection Module for Production Test of 52-Gbps PAM4 Signal Interfaces No.53
Magnetocardiography measurements by using active magnetic canceller No.53
High-resolution Time-domain Reflectometry Analysis in Back-end-of-line (BEOL) by Recursive Circuit Modelling No.52
Drain-induced barrier lowering in normally-off AlGaN-GaN MOSFETs with singleor double-recess overlapped gate No.51
A Stressed Eye Testing Module for Production Test of 30-Gbps NRZ Signal Interfaces No.51
Accurate error bit mode analysis of STT-MRAM chip with a novel current measurement module implemented to gigabit class memory test system No.51
Photonic Integrated Circuit Using Lanthanum-Modified Lead Zirconate Titanate Thin Films No.50
Lensless high-resolution photoacoustic imaging scanner for in vivo skin imaging No.50
Delay Fault Testing Using CloudTesting™ Services No.50
A New Method for Measuring Alias-Free Aperture Jitter in an ADC Output No.49
Fundamentals of quadrature modulation-demodulation and signal analysis No.49
A Jitter Separation and BER Estimation Method for Asymmetric Total Jitter Distributions No.49
Novel Crosstalk Evaluation Method for High-Density Signal Traces Using Clock Waveform Conversion Technique. No.48
Power Supply Impedance Emulation to Eliminate Overkills and Underkills due to the Impedance Difference between ATE and Customer Board No.48
An Optical Interconnection Test Method Applicable to 100-Gb/s Transceivers using an ATE based Hardware No.48
Known-Good-Die Test Methods for Large, Thin, High-Power Digital Devices No.47
Modeling of contact resistance at very small contact point No.47
A 10 MHz - 6 GHz High Power High Linearity 35 dB Digital Step Attenuator MMIC Using GaN HEMTs with TaON Passivation No.46
A Technique for Analyzing On-chip Power Supply Impedance No.46
Development of optical functional devices using epitaxially grown lanthanum-modified lead zirconate titanate films No.45
An ATE System for Testing 2.4-GHz RF Digital Communication Devices with QAM Signal Interfaces No.45
Statistical Silicon Results of Dynamic Power Integrity Control of ATE for Eliminating Overkills and Underkills No.44
Three dimensional profile measurement using multi-channel detector MVM-SEM No.44
An ATE Based 32 Gbaud PAM-4 At-Speed Characterization and Testing Solution No.44
A 10MHz-12GHz low-distortion high-speed SP4T switch using GaN HEMTs with oxynitride TaON passivation No.43
Development DC test technology with high additional value adopting digital controlled technology No.43
Static/Dynamic Characteristics Testing for capacitive Acceleration Sensor MEMS No.43
Advanced Method to Refine Waveform Smeared by Jitter in Waveform Sampler Measurement No.43
30-Gb/s Optical and Electrical Test Solution for High-Volume Testing No.42
A New Method for Off-Chip or On-Die Timing Noise Measurement No.42
Time to Market Reduction from Pre-/Post-Silicon Verification to Production on ATE No.42
Power Integrity Control of ATE for Emulating Power Supply Fluctuations on Customer Environment No.41
Real-time photoacoustic imaging system for clinical burn diagnosis No.41
Low Cost Test Method for RF Communication Devices Using Equivalent EVM Approach No.41
A slim column cell of 12nm resolution for wider application of E-beam lithography No.41
High aspect wiring by the inkjet No.41
8Gbps CMOS Pin Electronics Hardware Macro with Simultaneous Bi-directional Capability No.40
RNA: Advanced Phase Tracking Method for Digital Waveform Reconstruction No.40
Development of high-power pulsed fiber lasers No.40
The resonance adjustment methods for magnetically coupled resonance wireless power transfer No.40
VPCS "Vacuum probe contact system" No.39
Elegant Construction of SSC Implemented Signal by AWG And Organized Under-sampling of Wideband Signal No.39
Electro-optic and dielectric characterization of ferroelectric films for high-speed optical waveguide modulators No.38
Real-Time Testing Method for 16 Gbps 4-PAM Signal Interface No.38